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In these instructions, `M' (the address of the instruction after indexing) is used as a number instead of as the address of a memory cell. Consequently, `M' can have any valid word value (i.e., it's not limited to the 0-3999 range of a memory address).
ENTA
rA <- M
.
ENTX
rX <- M
.
ENTi
rIi <- M
.
ENNA
rA <- -M
.
ENNX
rX <- -M
.
ENNi
rIi <- -M
.
INCA
rA <- rA + M
.
INCX
rX <- rX + M
.
INCi
rIi <- rIi + M
.
DECA
rA <- rA - M
.
DECX
rX <- rX - M
.
DECi
rIi <- rIi - M
.
In the above instructions, the subfield `ADDRESS' acts as an immediate (indexed) operand, and allow us to set directly the contents of the MIX registers without an indirection to the memory cells (in a real CPU this would mean that they are faster that the previously discussed instructions, whose operands are fetched from memory). So, if you want to store in `rA' the value -2000 (- 00 00 00 31 16), you can use the binary instruction + 31 16 00 03 48, or, symbolically,
ENNA 2000
Used in conjuction with the store operations (`STA', `STX', etc.), these instructions also allow you to set memory cells contents to concrete values.
Note that in these address transfer operators, the `MOD' field is not a subfield specificator, but serves to define (together with `OPCODE') the concrete operation to be performed.